VLSI test symposium; proceedings.

IEEE VLSI Test Symposium (23rd: 2005: Palm Springs, California)

Computer Society Press

2005

455 pages

$234.00

Paperback

TK7874

Fifty-eight papers from the May 2005 symposium present the results of recent research on the testing of very large scale integration (VLSI) circuits and systems for the semiconductor design and manufacturing industries. Defect-oriented test methodologies address the need to provide test solutions for improved yield, while test data compression methodologies address the ever-increasing automatic test equipment costs. Other topics include minimal march tests for unlinked static faults in random access memories, a low cost scheme for online clock skew compensation, and a pseudo-functional scan-based built-in self- test scheme for delay fault. No subject index is provided.

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